diff --git a/libavcodec/riscv/huffyuvdsp_init.c b/libavcodec/riscv/huffyuvdsp_init.c
index b49b3dc097..79e93e213f 100644
--- a/libavcodec/riscv/huffyuvdsp_init.c
+++ b/libavcodec/riscv/huffyuvdsp_init.c
@@ -35,7 +35,8 @@ av_cold void ff_huffyuvdsp_init_riscv(HuffYUVDSPContext *c,
 
     if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) {
         c->add_int16 = ff_add_int16_rvv;
-        c->add_hfyu_left_pred_bgr32 = ff_add_hfyu_left_pred_bgr32_rvv;
+        if (flags & AV_CPU_FLAG_RVB_BASIC)
+            c->add_hfyu_left_pred_bgr32 = ff_add_hfyu_left_pred_bgr32_rvv;
     }
 #endif
 }
diff --git a/libavcodec/riscv/huffyuvdsp_rvv.S b/libavcodec/riscv/huffyuvdsp_rvv.S
index 9c4434907d..d334f5c6d0 100644
--- a/libavcodec/riscv/huffyuvdsp_rvv.S
+++ b/libavcodec/riscv/huffyuvdsp_rvv.S
@@ -36,8 +36,10 @@ func ff_add_int16_rvv, zve32x
         ret
 endfunc
 
-func ff_add_hfyu_left_pred_bgr32_rvv, zve32x
-        vsetivli zero, 4, e8, m1, ta, ma
+func ff_add_hfyu_left_pred_bgr32_rvv, zve32x, zbb
+        vtype_ivli t1, 4, e8, ta, ma
+        li      t0, 4
+        vsetvl  zero, t0, t1
         vle8.v  v8, (a3)
         sh2add  a2, a2, a1
 1: