Rémi Denis-Courmont 982376660c lavu/riscv: align functions to 4 bytes ... Currently the start of the byte range for each function is aligned to 4 bytes. But this can lead to situations whence the function is preceded by a 2-byte C.NOP at the aligned 4-byte boundary. Then the first actual instruction and the function symbol are only aligned on 2 bytes. This forcefully disables compression for the alignment and the symbol, thus ensuring that there is no padding before the function.		2024-07-25 23:10:14 +03:00
..
asm.S	lavu/riscv: align functions to 4 bytes	2024-07-25 23:10:14 +03:00
bswap.h	lavu/riscv: use Zbb REV8 at run-time	2024-06-11 20:12:37 +03:00
bswap_rvb.S	riscv: factor out the bswap32 assembler	2023-10-02 22:28:21 +03:00
cpu.c	lavu/riscv: add CPU flag for B bit manipulations	2024-07-25 23:09:58 +03:00
cpu.h	avutil/riscv/cpu: fix __riscv_v_min_vlen typo	2024-06-26 12:50:02 +02:00
cpu_common.c	riscv: probe for Zbb extension at load time	2024-06-11 20:12:37 +03:00
fixed_dsp_init.c	lavu/fixed_dsp: R-V V fmul_window_scaled	2023-11-23 18:57:18 +02:00
fixed_dsp_rvv.S	lavu/riscv: require B or zba explicitly	2024-07-25 18:55:48 +03:00
float_dsp_init.c	lavu/float_dsp: R-V V scalarproduct_double	2024-05-31 22:22:43 +03:00
float_dsp_rvv.S	lavu/riscv: require B or zba explicitly	2024-07-25 18:55:48 +03:00
intmath.h	lavu/riscv: use Zbb CLZ/CTZ/CLZW/CTZW at run-time	2024-06-11 20:12:37 +03:00
lls_init.c	lavu/lls: R-V V update_lls	2024-06-01 18:05:58 +03:00
lls_rvv.S	lavu/lls: remove useless VSETVL	2024-06-29 21:03:44 +03:00
Makefile	riscv: probe for Zbb extension at load time	2024-06-11 20:12:37 +03:00
timer.h	Revert "lavu/timer: remove gratuitous volatile"	2023-09-28 17:48:18 +03:00