Rémi Denis-Courmont 9aeb6aca3a lavu/floatdsp: RISC-V V vector_fmul_reverse		2022-09-27 13:19:52 +02:00
..
asm.S	lavu/riscv: fallback macros for SH{1, 2, 3}ADD	2022-09-27 13:19:52 +02:00
bswap.h
cpu.c	lavu/cpu: CPU flags for the RISC-V Vector extension	2022-09-27 13:19:52 +02:00
float_dsp_init.c	lavu/floatdsp: RISC-V V vector_fmul_reverse	2022-09-27 13:19:52 +02:00
float_dsp_rvv.S	lavu/floatdsp: RISC-V V vector_fmul_reverse	2022-09-27 13:19:52 +02:00
intmath.h	lavu/riscv: fix off-by-one in bit-magnitude clip	2022-09-15 18:11:12 -03:00
Makefile	lavu/floatdsp: RISC-V V vector_fmul_scalar	2022-09-27 13:19:52 +02:00
timer.h